Abstract

MOLINAR-SOLIS, J.E. et al. Electrical Parameters Extraction of CMOS Floating-Gate Inverters. Ing. invest. y tecnol. [online]. 2010, vol.11, n.3, pp.315-323. ISSN 2594-0732.

This work provides an accurate methodology for extracting the floating-gate gain factory, of CMOS floating-gate inverters with a clock-driven switch for accessing temporarilly to the floating-gate. With the methodology proposed in this paper, the γ factor and other parasitic capacitances coupled to the floating-gate can be easily extracted in a mismatch-free approach. This parameter plays an important role in modern analog and mixed-signal CMOS circuits, since it limits the circuit performance. Theoretical and measured values using two test cells, fabricated in a standard double poly double metal CMOS AMI-ABN process with 1.2 µm design rules, were compared. The extracted parameters can be incorporated into floating-gate PS pice macromodels for obtaining accurate electrical simulation.

Keywords : FG-inverter; neuMOS; floating-gate.