Design and fabrication of a low speed impact tester

 

M. Navarrete¹, F. A. Godínez² & F. Serrania¹

 

¹ Instituto de Ingeniería, Edificio 12, Sección de Ing. Mecánica, Térmica y Fluidos, Universidad Nacional Autónoma de México, Apartado Postal 70-472. México, D. F.

² Posgrado de la Facultad de Ingeniería, Sección de Ing. Mecánica, Universidad Nacional Autónoma de México, Apartado Postal 70-472. México, D. F. Email: mnm@pumas.iingen.unam.mx

 

Received: January 15^th, 2003.
Accepted: February 26^th, 2003.

 

Abstract

The impact response of sandwich panels with an improved structure to increase their impact resistance is investigated. In order to compare the impact performance of sandwich structures, a specific and instrumented drop-weight impact tester was designed and developed. The experimental part of this work is an evaluation on composite sandwich panels behavior used in the manufacturing of the UNAM Electrobús chassis. Two different sandwich structures are analyzed: the first type is a structure composed by a glass fiber-polyester matrix composite facesheets and a polyethylene honeycomb core. The second one consists of facesheets made from a glass fiber-epoxy matrix composite laminate and core formed by internal phenolic honeycomb structure. The first structure was specifically designed to improve crashworthiness for transport applications. The main results of this study are evaluated from the absorbed energy performance of the sandwich structures subjected to a single impact, and the development of useful criteria for materials selection.

Keywords: Sandwich panels, Composite structures, Low impact behavior.

 

Resumen

El proyecto consiste en diseñar, en un sistema FPGA, una memoria dinámica especial llamada MCS-S (MIDI Capture System-Segmented) para capturar, en tiempo real y en forma paralela, datos musicales que provienen de un conjunto de instrumentos mientras tocan en una orquesta, y obtener su partitura. Dentro del sistema, cada segmento de memoria almacena las notas que corresponden a cada instrumento. El control del sistema prepara automáticamente las celdas de memoria necesarias para cada instrumento e inserta de forma paralela nuevas notas para cada segmento. Los componentes electrónicos del sistema están programados en VHDL para después realizar la implementación en FPGA.

 

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Acknowledgements

We are grateful to Instituto de Ingeniería UNAM, and DGAPA- UNAM for the financial support of this work provided by grants 2115 and IN1 12402-3, respectively.

 

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