Resumen

BEN JMAA, Yomna; BEN ATITALLAH, Rabie; DUVIVIER, David  y  BEN JEMAA, Maher. A Comparative Study of Sorting Algorithms with FPGA Acceleration by High Level Synthesis. Comp. y Sist. [online]. 2019, vol.23, n.1, pp.213-230.  Epub 26-Feb-2021. ISSN 2007-9737.  https://doi.org/10.13053/cys-23-1-2999.

Nowadays, sorting is an important operation for several real-time embedded applications. It is one of the most commonly studied problems in computer science. It can be considered as an advantage for some applications such as avionic systems and decision support systems because these applications need a sorting algorithm for their implementation. However, sorting a big number of elements and/or real-time decision making need high processing speed. Therefore, accelerating sorting algorithms using FPGA can be an attractive solution. In this paper, we propose an efficient hardware implementation for different sorting algorithms (BubbleSort, InsertionSort, SelectionSort, QuickSort, HeapSort, ShellSort, MergeSort and TimSort) from high-level descriptions in the zynq-7000 platform. In addition, we compare the performance of different algorithms in terms of execution time, standard deviation and resource utilization. From the experimental results, we show that the SelectionSort is 1.01-1.23 times faster than other algorithms when N < 64; Otherwise, TimSort is the best algorithm.

Palabras llave : FPGA; sorting algorithms; heterogeneous architecture CPU/FPGA; zynq platform.