Resumen

GARDUZA-GONZALEZ, Sergio; GOMEZ-CASTANEDA, Felipe; MORENO-CADENAS, José Antonio  y  PONCE-PONCE, Víctor Hugo. A Prototype CMOS Image Sensor with a Column-Level Modulation Architecture. Ing. invest. y tecnol. [online]. 2016, vol.17, n.2, pp.237-249.  Epub 04-Abr-2022. ISSN 2594-0732.

A CMOS image sensors is composed of array pixel, row/column selection logic and analog to digital converter. The performance of this latter influences the image sensor overall performance. An alternative studied in recent years, is the oversampling architecture, unlike traditional Nyquist architecture, has the same signal to noise ratio, but with 1-bit quantizer. It is major advantage is attractive to reduce dependence on technological imperfections of the circuits. This paper presents the design of a prototype CMOS image sensor with basic performance to digital still-photography, which includes sigma-delta modulator at the 4-columns. The sigma -delta modulation takes advantage of oversampling, robustness and compatibility with MOSFET devices. To design the modulator, the SNR was optimized, through a model which includes noise sources. All circuits were implemented with mixed signal design rules and manufactured on a single chip using standard CMOS technology. The results of measurements and images obtained with the prototype show that the design methodology used is reliable. This prototype is a VLSI circuit and is the basis for the design of the new photodetection systems in other applications.

Palabras llave : oversampling analog-digital converter; power spectral density; behavioral model; sigma-delta modulation signal-to-quantizer noise-ratio; quantizer noise; CMOS image sensor; metal-oxide-semiconductor field effect transistor.