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Ingeniería, investigación y tecnología
versión On-line ISSN 2594-0732versión impresa ISSN 1405-7743
Resumen
LINARES-ARANDA, M.; GONZALEZ-DIAZ, O. y SALIM-MAZA, M.. Synchronization of Integrated Systems on a Chip. Ing. invest. y tecnol. [online]. 2012, vol.13, n.2, pp.127-139. ISSN 2594-0732.
In the present paper, the non-conventional interconnected and coupled ring oscillators approach working as clock distribution networks to synchronize electronic systems on a chip (SoC) is proposed. Typical CMOS (Complementary Metal-Oxide Semiconductor) N-well 0.35 μm Austria Micro Systems process parameters were used for conventional and non-conventional clock distribution nets design and simulation. Experimental results from local and global clock distribution networks fabricated using a CMOS 0.35 μm process show that the use of interconnected rings arrays, as globally asynchronous locally synchronous (GALS) clock distribution networks, represent an appropriate approach due to good performance regarding scalability, low clock-skew, high-speed, faults tolerant and robust under process variations, regularity, and modularity.
Palabras llave : clock networks; synchronization; systems on a chip; digital circuits; voltage controlled oscillators.