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Ingeniería, investigación y tecnología
versão On-line ISSN 2594-0732versão impressa ISSN 1405-7743
Resumo
VALDEZ-BAHENA, Adolfo; LEON-ALDACO, Susana Estefany De e AGUAYO-ALQUICIRA, Jesús. FPGA-Based Digital Implementation of PWM Technique for Cascaded Multilevel Inverter. Ing. invest. y tecnol. [online]. 2020, vol.21, n.4, 00004. Epub 20-Nov-2020. ISSN 2594-0732. https://doi.org/10.22201/fi.25940732e.2020.21.4.032.
The development of multilevel inverter topologies has given rise to various pulse width modulation techniques, among the most used are those that use multiple carrier signals. However, the drawback of implementing this type of modulation techniques is that it is necessary to generate a large number of switching signals for all the power semiconductor devices that make up the inverter. Field-Programmable Gate Arrays are a powerful tool that allows these signals to be obtained quickly and accurately. The purpose of this article is to describe the methodology used for digitally generate the switching signals for a multilevel inverter using a Field-Programmable Gate Array. The procedure used is divided into two programs; a Matlab script and a code created in Quartus II. The design process presented is easy, fast, flexible and applicable to other multicarrier modulation techniques. The modulation technique implemented in the Field-Programmable Gate Array is experimentally verified in a three-phase cascaded multilevel inverter to generate five output voltage levels with different modulation rates. The results obtained experimentally are compared with those obtained in simulation using PSpice. The analysis of the results allows to check the correct functioning of the implemented modulation technique.
Palavras-chave : Cascaded Multilevel Inverter; FPGA; Matlab; PWM technique; Quartus II.